Reconfiguration support for vector operations
نویسندگان
چکیده
منابع مشابه
Reconfiguration support for vector operations
A programmable vector processor and its implementation on a Field-Programmable Gate Array (FPGA) board are presented. This processor is composed of a vector core and a tightly coupled five-stage pipelined RISC scalar unit. It supports the IEEE 754 single-precision floating-point standard and also the efficient implementation of some sparse matrix operations. The processor runs at 70 MHz on the ...
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ژورنال
عنوان ژورنال: International Journal of High Performance Systems Architecture
سال: 2007
ISSN: 1751-6528,1751-6536
DOI: 10.1504/ijhpsa.2007.015394